Intel Core i7
Intel Core i7 is a family of Intel desktop processors and x86-64 (64-bit) notebooks. The family was launched with first-generation Intel Nehalem microarchitecture being the successor to the Intel Core 2 processors and was coded Clarkfield
And Bloomfield, Lynnfield (processors for high-end high-end and general-purpose desktops, respectively, both of the first-generation Nehalem architecture). The name continued using the Intel Core brand. It was officially released on November 17, 2008, being manufactured in Arizona, New Mexico. It is currently under the 7th generation of processors called Kaby Lake , which, like its predecessor Skylake uses 14nm lithography, with manufacturing process using FinFET 3D transistors, increasing in almost three times the capacity to manufacture smaller transistors for processors compared The first generation.
Designed to replace the Front Side Bus. Works like a high-speed point-to-point interconnect. Each processor has its memory controller (dedicated memory) and cache memory, causing the processors to communicate directly with the input and output controller. Processors can directly access each other’s cache because of the interconnections between them, also allowing the flow of data in both directions at the same time.
It is called the link between two QuickPath devices, consisting of a set of one-way signals transmitted by one device and received by another.
The QuickPath functions are grouped into four layers:
Physical Layer: control of data transfer related to electrical signals. It includes problems with sending and receiving bits.
Communication Layer: treatment of errors occurred during the transfer of data from the physical layer to itself.
Routing Layer: Ensures the appropriate data is sent to its destination. Data destined within the device itself is sent to the protocol layer.
Protocol Layer: maintain cache coherence; Control system functions.
Efficient energy consumption;
Support for new capabilities.
Tick-tock is a model adopted by Intel to follow the changes made in its processors. “Tique” refers to the improvement of an earlier architecture, and “Taque” refers to a new microarchitecture. Every 18 months the launching of a “Tique” or a “Taque” is planned, that is, if it improves a microarchitecture already implemented or if a new one is launched.
The overclocking process of the Bloomfield architecture is similar to the AMD architecture due to HCM. Overclocking will be possible with the 900 series and a motherboard equipped with the X58 chipset. In early October 2008, reports have emerged that it will not be possible to use “performance” DDR3 DIMMs that require voltages higher than 1.65V because the integrated memory controller under the Core i7 will be damaged.
Bloomfield has three memory channels. The channel bandwidth can be selected by the multiplier memory configuration. However, at initial reference values, when the clock rate is set at an upper limit (1333 to 965XE), the processor will only access two memory channels simultaneously. The 965XE has higher memory transfer rate with 3xDDR3-1333 than with 3xDDR3-1600, and 2xDDR3-1600 has a transfer rate almost equal to 3xDDR3-1333.
The Core i7 950 and Core i7 975 Extreme Edition were introduced in March 2009 with prices similar to the prices of the 940 and 965 Extreme Edition, respectively, but with better performance in each case. Intel is scheduled to discontinue the 940 and 965XE for Q3 2009.
Lynnfield is the first processor sold on the Core i7 brand, and at the same time being sold as Core i5. Unlike Bloomfield, it does not have a QPI interface but connects directly to the south-bridge and other devices that use the PCI Express Direct Media Interface attached in socket 1156. Core i7 based on Lynnfield has HT (Hyper-Threading), which is Disabled on Core i5 Lynnfield processors.
Called Sandy Bridge, it’s the next trend to be released. In its next “Tique” will be the change of the Nehalem architecture of 45 nanometers to 32 nanometers. Such Core i7 is followed by Core i7 Second Generation, which are up to 30% faster.